SK hynix says it has completed development and readied mass production of HBM4, signaling a new performance and efficiency baseline for next‑generation AI accelerators and cloud infrastructure. HBM4 doubles per‑stack bandwidth versus the prior generation by moving to a 2,048‑bit I/O interface and pushing data rates beyond 10 Gbps per pin, exceeding the JEDEC baseline of 8 Gbps for this class of memory. The company also cites more than 40% improvement in power efficiency, a critical lever as AI clusters strain data center power envelopes. Taken together, SK hynix claims this can lift end‑to‑end AI service performance by up to roughly two‑thirds.